27th Annual
IEEE High Performance Extreme Computing Virtual Conference
25 - 29 September 2023

HPEC 2023 AGENDA

Monday, September 25

1-4: BRAINS – Building Resilience through Artificial Intelligence for Networked Systems Session (15:45-17:00)
Chair: S. Pisharody

 

Invited Talk: Integration of Effort in National Cyber Defense
Lt. Col. Dr. Sean Atkins (US Air Force)

Zero Trust Architecture Approach for Developing Mission Critical Embedded Systems
Michael Vai, David Whelihan, Eric Simpson, Donato Kava, Alice Lee, Huy Nguyen, Jeffrey Hughes, Gabriel Torres, Jeffery Lim, Ben Nahill, Roger Khazan (MIT Lincoln Laboratory), Fred Schneider (Cornell University)

This paper describes a Zero Trust Architecture (ZTA) approach for the survivability development of mission critical embedded systems. Designers could use ZTA as a systems analysis tool to explore the design space. The ZTA concept of “never trust, always verify” is being leveraged in the design process to guide the selection of security and resilience features for the codesign of functionality, performance, and survivability. The design example of a small drone for survivability is described along with the explanation of the ZTA approach.

Optimizing a Distributed Graph Data Structure for K-Path Centrality Estimation on HPC [Outstanding Student Paper Award]
Lance Fletcher (Texas A&M Univ.), Trevor Steil, Roger Pearce (LLNL)

K-Path centrality is based on the flow of information in a graph along simple paths of length at most K. This work addresses the computational cost of estimating K-path centrality in large-scale graphs by introducing the random neighbor traversal graph (RaNT-Graph). The distributed graph data structure employs a combination of vertex delegation partitioning and rejection sampling, enabling it to sample massive amounts of random paths on large scale-free graphs. We evaluate our approach by running experiments which demonstrate weak scaling on R-MAT graphs and strong scaling on large real-world graphs. The RaNT-Graph approach achieved a 56,544x speedup over the baseline 1D partition implementation when estimating K-path centrality on a graph with 89 million vertices and 1.9 billion edges.

Hardware Root-of-Trust Support for Operational Technology Cybersecurity in Critical Infrastructures
Peter Moore, Alan Ehret, Michel Kinsy (STAM Center, ASU)

Operational technology (OT) systems use hardware and software to monitor and control physical processes, devices, and infrastructure – often critical infrastructures. The convergence of information technology (IT) and OT has significantly heightened the cyber threats in OT systems. Although OT systems share many of the hardware and software components in IT systems, these components often operate under different expectations. In this work, several hardware root-of-trust architectures are surveyed and the attacks each one mitigates are compared. Attacks spanning the design, manufacturing, and deployment life cycle of safety-critical operational technology are considered. The survey examines architectures that provide a hardware root-of-trust as a peripheral component in a larger system, SoC architectures with an integrated hardware root-of-trust, and FPGA-based hardware root-of-trust systems. Each architecture is compared based on the attacks mitigated. The comparison demonstrates that protecting operational technology across its complete life cycle requires multiple solutions working in tandem.

Deployment of Real-Time Network Traffic Analysis using GraphBLAS Hypersparse Matrices and D4M Associative Arrays [Outstanding Paper Award]
Michael S Jones, Jeremy Kepner, Andrew Prout (MIT Lincoln Laboratory), Timothy Davis (Texas A&M), William Arcand, David Bestor, William Bergeron, Chansup Byun, Vijay Gadepally, Michael Houle, Matthew Hubbell, Hayden Jananthan, Anna Klein, Lauren Milechin, Guillermo Morales, Julie Mullen, Ritesh Patel, Sandeep Pisharody, Albert Reuther, Antonio Rosa, Siddharth Samsi, Charles Yee, Peter Michaleas (MIT Lincoln Laboratory)

Matrix/array analysis of networks can provide significant insight into their behavior and aid in their operation and protection. Prior work has demonstrated the analytic, performance, and compression capabilities of GraphBLAS (graphblas. org) hypersparse matrices and D4M (d4m.mit.edu) associative arrays (a mathematical superset of matrices). Obtaining the benefits of these capabilities requires integrating them into operational systems, which comes with its own unique challenges. This paper describes two examples of real-time operational implementations. First, is an operational GraphBLAS implementation that constructs anonymized hypersparse matrices on a high-bandwidth network tap. Second, is an operational D4M implementation that analyzes daily cloud gateway logs. The architectures of these implementations are presented. Detailed measurements of the resources and the performance are collected and analyzed. The implementations are capable of meeting their operational requirements using modest computational resources (a couple of processing cores). GraphBLAS is well-suited for low-level analysis of high-bandwidth connections with relatively structured network data. D4M is well-suited for higher-level analysis of more unstructured data. This work demonstrates that these technologies can be implemented in operational settings.

1-K: Keynote Session (17:30-18:00)
Co-Chairs: J. Kepner & A. Reuther

The Future Of Supercomputing in an AI World
Steve Oberlin (NVIDIA CTO for Accelerated Computing)

1-S1: LLMs: Opportunities & Challenges Special (17:30-19:30)
Co-Chairs: V. Gadepally

 

Invited Talk: Legal Opportunities and Challenges
Lt. Col. Dr. Andrew Bowne (USAF)

Invited Talk: Information Extraction for Models
Dr. Mike Cafarella (MIT CSAIL)

Invited Talk: Crafting a Legislative Framework for the Age of Generative AI: Insights from ChatGPT
Justin Curtis (Chief of Staff, Sen. Feingold)

Invited Talk: Legal Aspects of Generative AI
Dimitrios Ioannidis, Esq. (Roach, Ioannidis & Megaloudis, LLC)

IEEE HPEC 2023